產品介紹∣可編程量子系統控制器

Zurich Instruments 的可編程量子系統控制器PQSC，是一款用於操控所有QCCS 儀器以實現多量子比特(多達100 個) 量子計算的控制器。PQSC 提供的ZSync 低延遲實時通信鏈，專為量子計算設計：PQSC突破了傳統控制方式的局限，使快速自動化量子比特校準的常規化成為現實。PQSC 的FPGA 型號是功能強大的Xilinx UltraScale+。直接對 FPGA 進行編程配置，並通過開發經過優化的新訊號處理方案，可以實現更為複雜的功能，例如在特定的量子算法和量子計算機架構中進行快速啟動和糾錯等。
PQSC 擁有18 個ZSync 接口，用於連接Zurich Instruments 的SHFSG或 HDAWG , 和SHFQA，分別用於量子比特的控制和讀取。UHFQA 可以通過32 位DIO 接口與HDAWG 通信，進而通過HDAWG 連接到 PQSC。可擴展的架構可用於實現超過100 個AWG 通道的精準同步，並提供狀態監控，確保量子比特操控的質量和可靠性。ZSync 鏈路可同步所有儀器並將整個系統時鐘控制在亞納秒量級。ZSync 接口提供了一個雙向的數據傳遞接口，可將量子比特讀取結果送至PQSC 做集中處理，也可發出觸發訊號控制下位儀器做出同步響應。ZSync 鏈路具有嚴格的實時訊號特性：所有數據傳輸的時間精度可準確到一個時鐘週期，因而可以實現實驗中的快速調試、故障解析和糾錯。LabOne控制軟體為用戶提供控制所有儀器的高級界面，並支持多種API，如Python、LabVIEW™、C、MATLAB ®、及.NET。

應用

量子計算
量子模擬: 中性原子阱
量子糾錯
量子比特主動復位

FPGA

型號	Xilinx ® UltraScale+™️ XCZU15EG-2I
系統邏輯單元	747 k
可配置邏輯模塊-觸發器(CLB flip-flops)	682 k
可配置邏輯模塊-查找表(CLB LUTs)	341 k
數位訊號處理片段數	3528
塊存儲器(Block RAM)	26.2 Mb
UltraRAM	31.5 Mb

處理器和內存

應用處理器	Quad ARM ® Cortex TM-A53 可至 1,333 MHz
實時處理器	Dual ARM ® Cortex TM-R5 可至 533 MHz
SDRAM	4 GB DDR4 (包含ECC)

時鐘

輸入頻率	自動檢測10 MHz / 100 MHz
輸入耦合	50 Ω, SMA 接口
輸出頻率	可切換10 MHz / 100 MHz
輸出幅度	> 1 V pp，阻抗50 Ω

接口和其他

主機連接接口	LAN / Ethernet, 1 Gbit/s USB 3.0 JTAG 經USB 2.0 接Xilinx ® ChipScope™️
設備連接接口	18 個ZSync 接口
ZSync 通信帶寬	下載200 MB/s 上傳100 MB/s
ZSync 通信延時	< 100 ns
觸發	2 個觸發輸入，2 個觸發輸出， 3.3 V TTL， SMA 接口
數位I/O	32 位, 3.3 V TTL, 通用

The Zurich Instruments PQSC Programmable Quantum System Controller brings together the instrumentation required for quantum computers with up to 100 qubits. Its ZSync low-latency, real-time communication links are designed specifically for quantum computing: the PQSC overcomes the practical limitations of traditional control methods, making automated and rapid qubit calibration routines a reality. Programming access to the powerful Xilinx UltraScale+ FPGA is the basis for developing new and optimized processing solutions for rapid tune-up and error correction adapted to the specific algorithm and computer architecture in use.

The PQSC comes with 18 ZSync ports to connect with the SHFSG or the HDAWG for qubit control and with the SHFQA for qubit readout. The UHFQA connects to the PQSC through its 32-bit DIO connector using the HDAWG as a bridge. This scalable architecture supports setups with more than 100 accurately synchronized AWG channels, and provides status monitoring to ensure quality and reliability of qubit tune-up routines. The ZSync links distribute the system clock to all instruments and synchronize all instruments to sub-nanosecond levels. Further, the links provide a bidirectional data interface to send qubit readout results to the PQSC for central processing, and to send trigger signals to the slave instruments to initiate synchronized actions. The ZSync links adhere to strict real-time behavior: all data transfers are predictable to single-clock-cycle precision. This enables the implementation of rapid tune-up procedures, syndrome decoding, and error correction routines. The LabOne control software provides a high-level interface to all instruments in the system and comes with APIs for Python, C, MATLAB®, LabVIEW™ and .NET.

Applications

Quantum computing
Quantum simulation: neutral trapped atoms
Quantum error correction
Active qubit reset

FPGA

Type	Xilinx® UltraScale+™️ XCZU15EG-2I
System logic cells	747k
CLB flip-flops	682k
CLB LUTs	341k
DSP slices	3,528
Block RAM	26.2 Mb
UltraRAM	31.5 Mb

CPUs and memory

Application processor	Quad ARM® Cortex TM-A53 up to 1,333 MHz
Real-time processor	Dual ARM® Cortex TM-R5 up to 533 MHz
SDRAM	4 GB DDR4 with ECC

Clock

Input frequency	Auto-detect 10 MHz / 100 MHz
Input coupling	50 Ω, SMA connector
Output frequency	Switchable 10 MHz / 100 MHz
Output amplitude	> 1 Vpp in 50 Ω

Connectivity and others

Host connection	LAN / Ethernet, 1 Gbit/s USB 3.0 JTAG over USB 2.0 for Xilinx® ChipScope™️ access
Device connection	18 ZSync ports
ZSync communication bandwidth	Down-stream 200 MB/s Up-stream 100 MB/s
ZSync communication latency	< 100 ns
Trigger	2 trigger inputs, 2 trigger outputs, 3.3 V TTL on SMA connector
Digital I/O	32 bits, 3.3 V TTL, general purpose